About & Download

DanPC is a simplified Minecraft version of the HACK hardware architecture specified in the book The Elements of Computing Systems: Building a Modern Computer from First Principles.

Download (V2, 2013-03-26, 863 KB)

Simplifications of HACK Spec
  • Word size is only 10 bit instead of 16 bit. This means ALU, registers, and RAM are only 10 bit.
  • The HACK instruction set is not fully used as not all comp instructions are implemented.
  • The ROM and RAM sizes are drastically smaller than specified.
  • No keyboard input or display output
Hardware Specs
  • 64 instruction ROM (64x16 bit)
  • 4 word RAM (4x10 bit)
Layout
Components
  1. ALU

    The ALU, or arithmetic and logic unit, performs aritmetic and logical operations on inputs.

    ALU (comp) instruction set when the Address register* is being used:

    • 0
    • 1
    • -1
    • D
    • A
    • !D
    • !A
    • -D
    • -A
    • D+1
    • A+1
    • D-1
    • A-1
    • D+A
    • D-A
    • A-D
    • D&A**
    • D|A**

    *Notationally, A is replaced with M when the RAM output is being used. (This is chosen by the A/M Multiplexor.)
    **These instructions are not yet implemented. They will probably never be added, as more logic gates would be required.

    Inputs: A/M Multiplexor, Data Register, Microcode Decoder; Outputs: Data Register, RAM (Input), ROM/ALU Multiplexor

  2. RAM

    The RAM, or random-access memory, stores data for future retrieval.

    Inputs: ROM (Write control), Address Register (Selection), ALU (Input); Outputs: A/M Multiplexor

  3. ROM

    The ROM, or read-only memory, stores preloaded instructions or programs.

    Inputs: Program Counter; Outputs: ROM/ALU Multiplexor (for A-instructions), Address Register (for A-instructions), RAM (Write control), Microcode Decoder (ALU instructions), Jump Logic

  4. Address Register

    The address register has three purposes: to select a memory cell, to provide a second operand to the ALU, to specify a target ROM address for a jump.

    Inputs: ROM/ALU Multiplexor; Outputs: Address Register (Selection), A/M Multiplexor, A/PC-incrementer Multiplexor

  5. Data Register

    The data register stores an operand or result for ALU.

    Inputs: ALU; Outputs: ALU

  6. Program Counter Register

    The PC register stores the ROM address of the current instruction.

    Inputs: A/PC-incrementer Multiplexor; Outputs: ROM, Program Counter Incrementer

  7. Program Counter Incrementer

    The program counter incrementer increments the current instruction by one.

    Inputs: Program Counter; Outputs: A/PC-incrementer Multiplexor

  8. ROM/ALU Multiplexor

    The ROM/ALU Multiplexor selects between storing the ALU output into the register and storing the ROM output into the Address Register (A-instruction).

    Inputs: ROM, ALU; Outputs: Address Register

  9. A/M Multiplexor

    The A/M Multiplexor selects between sending the RAM output to the ALU or sending the address register output to the ALU.

    Inputs: Address Register, RAM (Output); Outputs: ALU

  10. A/PC-incrementer Multiplexor

    The A/PC-incrementer Multiplexor selects between the incremented PC value, and the value of the address register for jumps.

    Inputs: Program Counter Incrementer, Address Register, Jump Logic; Outputs: Program Counter Register

  11. Jump Logic

    The jump logic contains gates that decide whether or not a jump condition has been satisfied.

    Inputs: ROM (Control), ALU; Outputs: A/PC-incrementer Multiplexor

  12. Microcode Decoder

    Decodes instructions from ROM and sends control signals to ALU.

    Inputs: ROM; Outputs: ALU

Screenshots